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Englisch
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Beschreibung
This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow¿s SoC designs.
This book tackles head-on the challenges of digital design in the era of billion-transistor SoCs. It discusses fundamental design concepts in design and coding required to produce robust, functionally correct designs. It also provides specific techniques for measuring and minimizing complexity in RTL code. Finally, it discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages must progress to address the needs of tomorrow¿s SoC designs.
Über den Autor
Mike Keating is a Synopsys Fellow. Over the last 12 years, he has been with Synopsys focusing on IP development methodology, hardware and software design quality and low power design. His current research focuses on high level design and the challenges of designing extremely complex systems. Mike received his BSEE and MSEE from Stanford University, and has over 25 years experience in ASIC and system design. He is co-author of the Reuse Methodology Manual and the Low Power Methodology Manual. In 2007, ISQED gave Mike the Quality Award for contributions to quality in electronic design.
Zusammenfassung
Provides an easily accessible guide that enables readers to write better, more verifiable code for complex SoCs
Describes techniques for successful SoC design, including simplifying RTL design, reducing complexity in control-dominated designs, reducing complexity in data path dominated designs, and simplifying interfaces
Discusses the tradeoff between RTL and high-level (C-based) design and how tools and languages should develop to fill future needs
Includes supplementary material: [...]
Inhaltsverzeichnis
The Challenges of Complex Design; Simplifying RTL Design; Reducing Complexity in Control-Dominated Designs; Hierarchical State Machines; More on State Space; Verification; Reducing Complexity in Data Path Dominated Designs; Simplifying Interfaces; Complexity at the Chip Level; Raising Abstraction Above RTL; SystemVerilog Extensions; The Future of Design.
Details
| Erscheinungsjahr: | 2014 |
|---|---|
| Fachbereich: | Nachrichtentechnik |
| Genre: | Importe, Technik |
| Rubrik: | Naturwissenschaften & Technik |
| Medium: | Taschenbuch |
| Inhalt: |
xvii
234 S. |
| ISBN-13: | 9781489998163 |
| ISBN-10: | 1489998160 |
| Sprache: | Englisch |
| Einband: | Kartoniert / Broschiert |
| Autor: | Keating, Synopsys Fellow |
| Hersteller: |
Springer US
Springer New York |
| Verantwortliche Person für die EU: | Springer Verlag GmbH, Tiergartenstr. 17, D-69121 Heidelberg, juergen.hartmann@springer.com |
| Maße: | 235 x 155 x 14 mm |
| Von/Mit: | Synopsys Fellow Keating |
| Erscheinungsdatum: | 01.10.2014 |
| Gewicht: | 0,388 kg |