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Covers the development of wafer level power discrete packaging with regular wafer level design concept and directly bumping technology
Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology
Presents the wafer level analog IC packaging design through fan-in and fan-out with RDLs
Chapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging.- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package.- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package.- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design.- Chapter 5. Wafer Level Discrete Power MOSFET Package Design.- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution.- Chapter 7. Thermal Management, Design, Analysis for WLCSP.- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP.- Chapter 9. WLCSP Typical Assembly Process.- Chapter 10. WLCSP Typical Reliability and Test.
Erscheinungsjahr: | 2016 |
---|---|
Fachbereich: | Nachrichtentechnik |
Genre: | Importe, Technik |
Rubrik: | Naturwissenschaften & Technik |
Medium: | Taschenbuch |
Inhalt: |
xvii
322 S. 58 s/w Illustr. 256 farbige Illustr. 322 p. 314 illus. 256 illus. in color. |
ISBN-13: | 9781493954384 |
ISBN-10: | 1493954385 |
Sprache: | Englisch |
Einband: | Kartoniert / Broschiert |
Autor: |
Liu, Yong
Qu, Shichun |
Auflage: | Softcover reprint of the original 1st edition 2015 |
Hersteller: |
Springer US
Springer New York Springer US, New York, N.Y. |
Verantwortliche Person für die EU: | Springer Verlag GmbH, Tiergartenstr. 17, D-69121 Heidelberg, juergen.hartmann@springer.com |
Maße: | 235 x 155 x 18 mm |
Von/Mit: | Yong Liu (u. a.) |
Erscheinungsdatum: | 23.08.2016 |
Gewicht: | 0,578 kg |
Covers the development of wafer level power discrete packaging with regular wafer level design concept and directly bumping technology
Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology
Presents the wafer level analog IC packaging design through fan-in and fan-out with RDLs
Chapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging.- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package.- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package.- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design.- Chapter 5. Wafer Level Discrete Power MOSFET Package Design.- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution.- Chapter 7. Thermal Management, Design, Analysis for WLCSP.- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP.- Chapter 9. WLCSP Typical Assembly Process.- Chapter 10. WLCSP Typical Reliability and Test.
Erscheinungsjahr: | 2016 |
---|---|
Fachbereich: | Nachrichtentechnik |
Genre: | Importe, Technik |
Rubrik: | Naturwissenschaften & Technik |
Medium: | Taschenbuch |
Inhalt: |
xvii
322 S. 58 s/w Illustr. 256 farbige Illustr. 322 p. 314 illus. 256 illus. in color. |
ISBN-13: | 9781493954384 |
ISBN-10: | 1493954385 |
Sprache: | Englisch |
Einband: | Kartoniert / Broschiert |
Autor: |
Liu, Yong
Qu, Shichun |
Auflage: | Softcover reprint of the original 1st edition 2015 |
Hersteller: |
Springer US
Springer New York Springer US, New York, N.Y. |
Verantwortliche Person für die EU: | Springer Verlag GmbH, Tiergartenstr. 17, D-69121 Heidelberg, juergen.hartmann@springer.com |
Maße: | 235 x 155 x 18 mm |
Von/Mit: | Yong Liu (u. a.) |
Erscheinungsdatum: | 23.08.2016 |
Gewicht: | 0,578 kg |